一种基于电感的改进双路交错并行架构均衡拓扑研究* |
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| 巫春玲, 刘智轩, 孟锦豪, 徐先峰, 郑克军 | ||||||||||||||
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Research on an Improved Balanced Topology of Two-circuit Interleaved Parallel Architecture Based on Inductance |
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| WU Chunling, LIU Zhixuan, MENG Jinhao, XU Xianfeng, ZHENG Kejun | ||||||||||||||
| 表3 在三种SOC初值条件下的仿真时间对比 |
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